2.99 See Answer

Question: Consider a system with memory mapping done


Consider a system with memory mapping done on a page basis and using a single-level page table. Assume the necessary page table is always in memory.
a. If a memory reference takes 200 ns, how long does a paged memory reference take?
b. Now we add an MMU that imposes an overhead of 20 ns on a hit or a miss. If we assume that 85% of all memory references hit in the MMU TLB, what is the Effective Memory Access Time (EMAT)?
c. Explain how the TLB hit rate affects the EMAT.


> Calculate how much disk space (in sectors, tracks, and surfaces) will be required to store 300,000 120-byte logical records if the disk is fixed sector with 512 bytes/sector, with 96 sectors/track, 110 tracks per surface, and 8 usable surfaces. Ignore an

> For the frequency-based replacement algorithm (see Figure 11.9), define Fnew, Fmiddle and Fold as the fraction of the cache that comprises the new, middle, and old sections, respectively. Clearly, Fnew+Fmiddle+Fold=1. Characterize the policy when a. Fold

> The following equation was suggested both for cache memory and disk cache memory: TS=TC+M×TD Generalize this equation to a memory hierarchy with N levels instead of just 2

> Consider a disk with N tracks numbered from 0 to (N-1) and assume requested sectors are distributed randomly and evenly over the disk. We want to calculate the average number of tracks traversed by a seek. a. Calculate the probability of a seek of length

> a. Perform the same type of analysis as that of Table 11.2 for the following sequence of disk track requests: 27, 129, 110, 186, 147, 41, 10, 64, 120. Assume the disk head is initially positioned over track 100 and is moving in the direction of decreasin

> In general terms, what are the four distinct actions that a machine instruction can specify?

> Generalize the result of Problem 11.1 to the case in which a program refers to n devices. Result of Problem 11.1: If the calculation time exactly equals the I/O time (which is the most favorable situation), both the processor and the peripheral device r

> An interactive system using round-robin scheduling and swapping tries to give guaranteed response to trivial requests as follows. After completing a round-robin cycle among all ready processes, the system determines the time slice to allocate to each rea

> Consider a 4-drive, 200 GB-per-drive RAID array. What is the available data storage capacity for each of the RAID levels, 0, 1, 3, 4, 5, and 6?

> It should be clear that disk striping can improve the data transfer rate when the strip size is small compared to the I/O request size. It should also be clear that RAID 0 provides improved performance relative to a single large disk, because multiple I/

> A 32-bit computer has two selector channels and one multiplexor channel. Each selector channel supports two magnetic disk and two magnetic tape units. The multiplexor channel has two line printers, two card readers, and ten VDT terminals connected to it.

> Consider a program that accesses a single I/O device and compare unbuffered I/O to the use of a buffer. Show that the use of the buffer can reduce the running time by at most a factor of two.

> Define residence time Tr as the average total time a process spends waiting and being served. Show that for FIFO, with mean service time Ts, we have Tr=Ts/(1−ρ), where is utilization.

> Draw a diagram similar to that of Figure 10.9b that shows the sequence events for this same example using priority ceiling. Figure 10.9b: Blocked by T, (attempt to lock s) s locked T2 Preempted by T Preempted by T; s unlocked s locked T3 14 I5 Time

> This problem demonstrates that although Equation (10.2) for rate monotonic scheduling is a sufficient condition for successful scheduling, it is not a necessary condition (i.e., sometimes successful scheduling is possible even if Equation (10.2) is not s

> Repeat Problem 10.4, adding MUF to the diagrams. Comment on the results. Data from Problem10.4: d. Consider a set of three periodic tasks with the execution profiles of Table 10.9a. Develop scheduling diagrams similar to those of Figure 10.5 for this set

> Define the two main categories of processor registers.

> Maximum-urgency-first (MUF) is a real-time scheduling algorithm for periodic tasks. Each task is assigned an urgency that is defined as a combination of two fixed priorities and one dynamic priority. One of the fixed priorities, the criticality, has prec

> Repeat Problem 10.3d for the execution profiles of Table 10.9b. Comment on the results. Data from Problem 10.3d: d. Consider a set of three periodic tasks with the execution profiles of Table 10.9a. Develop scheduling diagrams similar to those of Figure

> Least-laxity-first (LLF) is a real-time scheduling algorithm for periodic tasks. Slack time, or laxity, is the amount of time between when a task would complete if it started now and its next deadline. This is the size of the available scheduling window.

> Consider a set of five aperiodic tasks with the execution profiles of Table 10.8. Develop scheduling diagrams similar to those of Figure 10.6 for this set of tasks. Table 10.8: Figure 10.6: Table 10.8 Execution Profile for Problem 10.2 Process Arriv

> In a queuing system, new jobs must wait for a while before being served. While a job waits, its priority increases linearly with time from zero at a rate A job waits until its priority reaches the priority of the jobs in service; then, it begins to share

> Consider a variant of the RR scheduling algorithm where the entries in the ready queue are pointers to the PCBs. a. What would be the effect of putting two pointers to the same process in the ready queue? b. What would be the major advantage of this sche

> A processor is multiplexed at infinite speed among all processes present in a ready queue with no overhead. (This is an idealized model of round-robin scheduling among ready processes using time slices that are very small compared to the mean service tim

> Consider a set of three periodic tasks with the execution profiles of Table 10.7. Develop scheduling diagrams similar to those of Figure 10.5 for this set of tasks. Table 10.7: Figure 10.5: Table 10.7 Execution Profile for Problem 10.1 Process Arriv

> Prove that the minimax response ratio algorithm of the preceding problem minimizes the maximum response ratio for a given batch of jobs. (Hint: Focus attention on the job that will achieve the highest response ratio and all jobs executed before it. t1,

> In a nonpreemptive uniprocessor system, the ready queue contains three jobs at time t immediately after the completion of a job. These jobs arrived at times t1, t2, and t3 with estimated execution times of and respectively. Figure 9.18 shows the linear i

> List and briefly define the four main elements of a computer.

> Why is it impossible to determine a true global state?

> In the bottom example in Figure 9.5 , process A runs for two time units before control is passed to process B. Another plausible scenario would be that A runs for three time units before control is passed to process B. What policy differences in the feed

> Consider the following pair of equations as an alternative to Equation 9.3: Sn+1=αTn+(1−α)SnXn+1= min [Ubound, max[Lbound, (βSn+1)]] where Ubound and Lbound are prechosen upper and lower bounds on the estimated value of T. The value Xn+1 of is used in th

> Assume the following burst-time pattern for a process: 6, 4, 6, 4, 13, 13, 13, and assume the initial guess is 10. Produce a plot similar to those of Figure 9.9. Figure 9.9: 10 a= 0.8 a= 0.5 Simple average Observed value 2 3 45 9 10 11 12 13 14 15 1

> Prove that, among nonpreemptive scheduling algorithms, SPN provides the minimum average waiting time for a batch of jobs that arrive at the same time. Assume the scheduler must always execute a task if one is available.

> Consider the following set of processes: Perform the same analysis as depicted in Table 9.5 and Figure 9.5 for this set. Table 9.5: Figure 9.5: Process Arrival Time Processing Time A 3 В 1 3 D E 12 5 2. Table 9.5 A Comparison of Scheduling Policies

> Consider the following workload: a. Show the schedule using shortest remaining time, non preemptive priority (a smaller priority number implies higher priority) and round robin with quantum 30 ms. Use time scale diagram as shown below for the FCFS examp

> The IBM System/370 architecture uses a two-level memory structure and refers to the two levels as segments and pages, although the segmentation approach lacks many of the features described earlier in this chapter. For the basic 370 architecture, the pag

> Suppose the program statement is executed in a memory with page size of 1,000 words. Let n=1,000.Using a machine that has a full range of register-to-register instructions and employs index registers, write a hypothetical program to implement the forego

> In the VAX, user page tables are located at virtual addresses in the system space. What is the advantage of having user page tables in virtual rather than main memory? What is the disadvantage?

> A process contains eight virtual pages on disk and is assigned a fixed allocation of four page frames in main memory. The following page trace occurs: 1, 0, 2, 2, 1, 7, 6, 7, 0, 1, 2, 0, 3, 0, 4, 5, 1, 5, 2, 4, 5, 6, 7, 6, 7, 2, 4, a. Show the successive

> List the key design issues for an SMP operating system.

> A process references five pages, A, B, C, D, and E, in the following order: A; B; C; D; A; B; E; A; B; C; D; E Assume the replacement algorithm is first-in-first-out and find the number of page transfers during this sequence of references starting with a

> Consider the following string of page references 7, 0, 1, 2, 0, 3, 0, 4, 2, 3, 0, 3, 2. C[ i, j ]=A[ i, j ]+B[ i, j ] Complete a figure similar to Figure 8.14, showing the frame allocation for: a. FIFO (first-in-first-out) b. LRU (least recently used) c.

> a. How much memory space is needed for the user page table of Figure 8.3 ? b. Assume you want to implement a hashed inverted page table for the same addressing scheme as depicted in Figure 8.3 , using a hash function that maps the 20-bit page number into

> Consider the following program. Assume the program is running on a system using demand paging, and the page size is 1 kB. Each integer is 4 bytes long. It is clear that each array requires a 16-page space. As an example, A[0, 0]-A[0, 63], A[1, 0]-A[1, 6

> A key to the performance of the VSWS resident set management policy is the value of Q. Experience has shown that with a fixed value of Q for a process, there are considerable differences in page fault frequencies at various stages of execution. Furthermo

> Consider the following sequence of page references (each element in the sequence represents a page number): 1 2 3 4 5 2 1 3 3 2 3 4 5 4 5 1 1 3 2 5 Define the mean working set size after the kth reference as sk(Δ)=1k ∑t=1k|W

> In the S/370 architecture, a storage key is a control field associated with each page-sized frame of real memory. Two bits of that key that are relevant for page replacement are the reference bit and the change bit. The reference bit is set to 1 when any

> In discussing a page replacement algorithm, one author makes an analogy with a snowplow moving around a circular track. Snow is falling uniformly on the track, and a lone snowplow continually circles the track at constant speed. The snow that is plowed o

> Consider a page reference string for a process with a working set of M frames, initially all empty. The page reference string is of length P with N distinct page numbers in it. For any page replacement algorithm, a. What is a lower bound on the number of

> What is multithreading?

> Assuming a page size of 4 kB and that a page table entry takes 4 bytes, how many levels of page tables would be required to map a 64-bit address space, if the top-level page table fits into a single page?

> Suppose the page table for the process currently executing on the processor looks like the following. All numbers are decimal, everything is numbered starting from zero, and all addresses are memory byte addresses. The page size is 1,024 bytes. a. Descr

> Let buddyk(x) = address of the buddy of the block of size 2k whose address is x. Write a general expression for buddyk(x).

> Consider a buddy system in which a particular block under the current allocation has an address of 011011110000. a. If the block is of size 4, what is the binary address of its buddy? b. If the block is of size 16, what is the binary address of its buddy

> A 1-Mbyte block of memory is allocated using the buddy system. a. Show the results of the following sequence in a figure similar to Figure 7.6: Request 70; Request 35; Request 80; Return A; Request 60; Return B; Return D; Return C. b. Show the binary tre

> This diagram shows an example of memory configuration under dynamic partitioning, after a number of placement and swapping-out operations have been carried out. Addresses go from left to right; gray areas indicate blocks occupied by processes; white area

> Another placement algorithm for dynamic partitioning is referred to as worst-fit. In this case, the largest free block of memory is used for bringing in a process. a. Discuss the pros and cons of this method compared to first- , next-, and best-fit. b. W

> To implement the various placement algorithms discussed for dynamic partitioning, a list of the free blocks of memory must be kept. For each of the three methods discussed (best-fit, first-fit, next-fit), what is the average length of the search?

> Consider a dynamic partitioning scheme. Show that, on average, the memory contains half as many holes as segments.

> Consider a fixed partitioning scheme with equal-size partitions of bytes and a total main memory size of 224 bytes. A process table is maintained that includes a pointer to a partition for each resident process. How many bits are required for the pointer

> Explain the difference between a monolithic kernel and a microkernel.

> It should be possible to implement general semaphores using binary semaphores. We can use the operations semWaitB and semSignalB and two binary semaphores, delay and mutex. Consider the following: Initially, (s) is set to the desired semaphore value. Ea

> Now consider another correct solution to the preceding problem: a. Explain how this program works and why it is correct. b. Does this solution differ from the preceding one in terms of the number of processes that can be unblocked at a time? Explain. c.

> Now consider this correct solution to the preceding problem: a. Explain how this program works and why it is correct. b. This solution does not completely prevent newly arriving processes from cutting in line but it does make it less likely. Give an exa

> Consider the following ways of handling deadlock: (1) banker’s algorithm, (2) detect deadlock and kill thread, releasing all resources, (3) reserve all resources in advance, (4) restart thread and release all resources if thread needs to wait, (5) r

> Consider a memory in which contiguous segments S1, S2, …, Sn are placed in their order of creation from one end of the store to the other, as suggested by the following figure: When segment Sn+1 is being created, it is placed immediat

> Consider a simple segmentation system that has the following segment table: / For each of the following logical addresses, determine the physical address or indicate if a segment fault occurs: a. 0, 198 b. 2, 156 c. 1, 530 d. 3, 444 e. 0, 222

> Write the binary translation of the logical address 0001010010111010 under the following hypothetical memory management schemes, and explain your answer: a. A paging system with a 256-address page size, using a page table in which the frame number happe

> Consider a simple paging system with the following parameters: 232 bytes of physical memory; page size of 210 bytes; 216 pages of logical address space. a. How many bits are in a logical address? b. How many bytes are in a frame? c. How many bits in the

> During the course of execution of a program, the processor will increment the contents of the instruction register (program counter) by one word after each instruction fetch, but will alter the contents of that register if it encounters a branch or call

> The Fibonacci sequence is defined as follows: F0=0, F1=1, Fn+2=Fn+1+Fn, n≥0 a. Could this sequence be used to establish a buddy system? b. What would be the advantage of this system over the binary buddy system described in this chapter?

> Describe the round-robin scheduling technique.

> In Section 2.3, we listed five objectives of memory management, and in Section 7.1, we listed five requirements. Argue that each list encompasses all of the concerns addressed in the other. Data from Section 2.3: 1. Process isolation: The OS must preven

> In the THE multiprogramming system [DIJK68], a drum (precursor to the disk for secondary storage) is divided into input buffers, processing areas, and output buffers, with floating boundaries, depending on the speed of the processes involved. The current

> Suggest an additional resource constraint that will prevent the deadlock in Problem 6.7, but still permit the boundary between input and output buffers to vary in accordance with the present needs of the processes.

> A spooling system (see Figure 6.17) consists of an input process I, a user process P, and an output process O connected by two buffers. The processes exchange data in blocks of equal size. These blocks are buffered on a disk using a floating boundary bet

> In the code below, three processes are competing for six resources labeled A to F. a. Using a resource allocation graph (see Figures 6.5 and 6.6), show the possibility of a deadlock in this implementation. b. Modify the order of some of the get requests

> Given the following state for the Banker’s Algorithm: 6 processes P0 through P5 4 resource types: A (15 instances); B (6 instances) C (9 instances); D (10 instances) Snapshot at time T0: The first four columns of the 68 matrix compris

> It was stated that deadlock cannot occur for the situation reflected in Figure 6.3. Justify that statement. Figure 6.3: Progress of Q Release Release B Pand Q want A Required Pand Q want B Get A B Required Get B Progress of P Get A Release A Get B R

> For Figure 6.3, provide a narrative description of each of the six depicted paths, similar to the description of the paths of Figure 6.2 provided in Section 6.1. Figure 6.3: Figure 6.2: Progress of Q Release Release B Pand Q want A Required Pand Q

> Show how each of the techniques of prevention, avoidance, and detection can be applied to Figure 6.1. Figure 6.1: (a) Deadlock possible (b) Deadlock

> Consider a system consisting of four processes and a single resource. The current state of the claim and allocation matrices are: C= (3297) A= (1132) What is the minimum number of units of the resource needed to be available for this state to be safe?

> Explain the distinction between a real address and a virtual address.

> Suppose the following two processes, foo and bar, are executed concurrently and share the semaphore variables S and R (each initialized to 1) and the integer variable x (initialized to 0). a. Can the concurrent execution of these two processes result in

> A pipeline algorithm is implemented so a stream of data elements of type T produced by a process P0 passes through a sequence of processes P1, P2, …, Pn−1, which operates on the elements in that order. a. Define a generalized message buffer that contains

> Evaluate the banker’s algorithm for its usefulness in an OS.

> Consider a system with a total of 150 units of memory, allocated to three processes as shown: Apply the banker’s algorithm to determine whether it would be safe to grant each of the following requests. If yes, indicate a sequence of te

> In the THE multiprogramming system, a page can make the following state transitions: a. Define the effect of these transitions in terms of the quantities i, o, and p. b. Can any of them lead to a deadlock if the assumptions made in Problem 6.6 about inp

> Show that the four conditions of deadlock apply to Figure 6.1a. Figure 6.1a: (a) Deadlock possible

> Consider the following program: This software solution to the mutual exclusion problem for two processes is proposed in [HYMA66]. Find a counterexample that demonstrates that this solution is incorrect. It is interesting to note that even the Communicat

> Is busy waiting always less efficient (in terms of using processor time) than a blocking wait? Explain.

> Consider the following program: a. Determine the proper lower bound and upper bound on the final value of the shared variable tally output by this concurrent program. Assume processes can execute at any relative speed, and a value can only be incremente

> Consider the following program: Note the scheduler in a uniprocessor system would implement pseudo-parallel execution of these two concurrent processes by interleaving their instructions, without restriction on the order of the interleaving. a. Show a s

> List and briefly explain five storage management responsibilities of a typical OS.

> Processes and threads provide a powerful structuring tool for implementing programs that would be much more complex as simple sequential programs. An earlier construct that is instructive to examine is the coroutine. The purpose of this problem is to int

> At the beginning of Section 5.2, it is stated that multiprogramming and multiprocessing present the same problems, with respect to concurrency. This is true as far as it goes. However, cite two differences in terms of concurrency between multiprogramming

> Demonstrate that the following software approaches to mutual exclusion do not depend on elementary mutual exclusion at the memory access level: a. The bakery algorithm. b. Peterson’s algorithm.

> Consider Dekker’s algorithm written for an arbitrary number of processes by changing the statement executed when leaving the critical section from Evaluate the algorithm when the number of concurrently executing processes is greater tha

> Consider a sharable resource with the following characteristics: (1) As long as there are fewer than three processes using the resource, new processes can start using it right away. (2) Once there are three process using the resource, all three must le

> Consider the following definition of semaphores: Compare this set of definitions with that of Figure 5.6. Note one difference: With the preceding definition, a semaphore can never take on a negative value. Is there any difference in the effect of the tw

2.99

See Answer